#device PIC18F2525
/*        LIST

;==========================================================================
;  $Id: P18F2525.INC,v 1.11.2.3 2005/10/23 23:50:04 curtiss Exp $
;  MPASM PIC18F2525 processor include
; 
;  (c) Copyright 1999-2005 Microchip Technology, All rights reserved
;==========================================================================

        NOLIST

;==========================================================================
;  This header file defines configurations, registers, and other useful
;  bits of information for the PIC18F2525 microcontroller.  These names
;  are taken to match the data sheets as closely as possible.
;
;  Note that the processor must be selected before this file is included.
;  The processor may be selected the following ways:
;
;       1. Command line switch:
;               C:\MPASM MYFILE.ASM /PIC18F2525
;       2. LIST directive in the source file
;               LIST   P=PIC18F2525
;       3. Processor Type entry in the MPASM full-screen interface
;       4. Setting the processor in the MPLAB Project Dialog
;==========================================================================

;==========================================================================
;
;       Verify Processor
;
;==========================================================================
        IFNDEF __18F2525
           MESSG "Processor-header file mismatch.  Verify selected processor."
        ENDIF

;==========================================================================
;       18xxxx Family        EQUates
;==========================================================================
FSR0            EQU 0
FSR1            EQU 1
FSR2            EQU 2

FAST            EQU 1

W               EQU 0
A               EQU 0
ACCESS          EQU 0
BANKED          EQU 1
;==========================================================================

;==========================================================================
;       16Cxxx/17Cxxx Substitutions
;==========================================================================
  #define DDRA  TRISA      ; PIC17Cxxx SFR substitution
  #define DDRB  TRISB      ; PIC17Cxxx SFR substitution
  #define DDRC  TRISC      ; PIC17Cxxx SFR substitution
  #define DDRD  TRISD      ; PIC17Cxxx SFR substitution
  #define DDRE  TRISE      ; PIC17Cxxx SFR substitution

;==========================================================================
;
;       Register Definitions
;
;==========================================================================

;----- Register Files -----------------------------------------------------
*/
/*
#byte PORTA            =0x0F80
#byte PORTB            =0x0F81
#byte PORTC        	   =0x0F82
#byte PORTE            =0x0F84
#byte LATA             =0x0F89
#byte LATB 	     	   =0x0F8A
#byte LATC             =0x0F8B
#byte DDRA             =0x0F92
#byte TRISA            =0x0F92
#byte DDRB             =0x0F93
#byte TRISB     	   =0x0F93
#byte DDRC             =0x0F94
#byte TRISC            =0x0F94
#byte OSCTUNE          =0x0F9B
#byte PIE1             =0x0F9D
#byte PIR1             =0x0F9E
#byte IPR1             =0x0F9F
#byte PIE2             =0x0FA0
#byte PIR2             =0x0FA1
#byte IPR2             =0x0FA2
#byte EECON1           =0x0FA6
#byte EECON2           =0x0FA7
#byte EEDATA           =0x0FA8
#byte EEADR            =0x0FA9
#byte EEADRH           =0x0FAA
#byte RCSTA            =0x0FAB
#byte TXSTA            =0x0FAC
#byte TXREG            =0x0FAD
#byte RCREG            =0x0FAE
#byte SPBRG            =0x0FAF
#byte SPBRGH           =0x0FB0
#byte T3CON            =0x0FB1
#byte TMR3L            =0x0FB2
#byte TMR3H            =0x0FB3
#byte CMCON            =0x0FB4
#byte CVRCON           =0x0FB5
#byte BAUDCON          =0x0FB8
#byte BAUDCTL          =0x0FB8
#byte CCP2CON          =0x0FBA
#byte CCPR2            =0x0FBB
#byte CCPR2L           =0x0FBB
#byte CCPR2H           =0x0FBC
#byte CCP1CON          =0x0FBD
//#byte CCPR1            =0x0FBE
//#byte CCPR1H           =0x0FBF
#byte ADCON2           =0x0FC0
#byte ADCON1           =0x0FC1
#byte ADCON0           =0x0FC2
#byte ADRES            =0x0FC3
#byte ADRESL           =0x0FC3
#byte ADRESH           =0x0FC4
#byte SSPCON2          =0x0FC5
#byte SSPCON1          =0x0FC6
#byte SSPSTAT          =0x0FC7
#byte SSPADD           =0x0FC8
#byte SSPBUF           =0x0FC9
#byte T2CON            =0x0FCA
#byte PR2              =0x0FCB
#byte TMR2             =0x0FCC
#byte T1CON            =0x0FCD
#byte TMR1L            =0x0FCE
#byte TMR1H            =0x0FCF
#byte RCON             =0x0FD0
#byte WDTCON           =0x0FD1
#byte HLVDCON          =0x0FD2
#byte LVDCON           =0x0FD2
#byte OSCCON           =0x0FD3
#byte DEBUG            =0x0FD4
#byte T0CON            =0x0FD5
#byte TMR0L            =0x0FD6
#byte TMR0H            =0x0FD7
#byte STATUS           =0x0FD8
#byte FSR2L            =0x0FD9
#byte FSR2H            =0x0FDA
#byte PLUSW2           =0x0FDB
#byte PREINC2          =0x0FDC
#byte POSTINC2         =0x0FDE
#byte INDF2            =0x0FDF
#byte BSR              =0x0FE0
#byte FSR1L            =0x0FE1
#byte FSR1H            =0x0FE2
#byte PLUSW1           =0x0FE3
#byte PREINC1          =0x0FE4
#byte POSTDEC1         =0x0FE5
#byte POSTINC1         =0x0FE6
#byte INDF1            =0x0FE7
#byte WREG             =0x0FE8
#byte FSR0L            =0x0FE9
#byte FSR0H            =0x0FEA
#byte PLUSW0           =0x0FEB
#byte PREINC0          =0x0FEC
#byte POSTDEC0         =0x0FED
#byte POSTINC0         =0x0FEE
#byte INDF0            =0x0FEF
#byte INTCON3          =0x0FF0
#byte INTCON2          =0x0FF1
#byte INTCON           =0x0FF2
#byte PROD             =0x0FF3
#byte PRODL            =0x0FF3
#byte PRODH            =0x0FF4
#byte TABLAT           =0x0FF5
#byte TBLPTR           =0x0FF6
#byte TBLPTRL          =0x0FF6
#byte TBLPTRH          =0x0FF7
#byte TBLPTRU          =0x0FF8
#byte PC               =0x0FF9
#byte PCL              =0x0FF9
#byte PCLATH           =0x0FFA
#byte PCLATU           =0x0FFB
#byte STKPTR           =0x0FFC
#byte TOS              =0x0FFD
#byte TOSL             =0x0FFD
#byte TOSH             =0x0FFE
#byte TOSU             =0x0FFF
*/
//;----- OSCTUNE Bits -----------------------------------------------------
#bit TUN0             =OSCTUNE.0
#bit TUN1             =OSCTUNE.1
#bit TUN2             =OSCTUNE.2
#bit TUN3             =OSCTUNE.3
#bit TUN4             =OSCTUNE.4
#bit PLLEN            =OSCTUNE.6
#bit INTSRC           =OSCTUNE.7


//;----- PIE1 Bits -----------------------------------------------------
#bit TMR1IE           = PIE1.0
#bit TMR2IE           = PIE1.1
#bit CCP1IE           = PIE1.2
#bit SSPIE            = PIE1.3
#bit TXIE             = PIE1.4
#bit RCIE             = PIE1.5
#bit ADIE             = PIE1.6


//;----- PIR1 Bits -----------------------------------------------------
#bit TMR1IF           =PIR1.0
#bit TMR2IF           =PIR1.1
#bit CCP1IF           =PIR1.2
#bit SSPIF            =PIR1.3
#bit TXIF             =PIR1.4
#bit RCIF             =PIR1.5
#bit ADIF             =PIR1.6


//;----- IPR1 Bits -----------------------------------------------------
#bit TMR1IP           =IPR1.0
#bit TMR2IP           =IPR1.1
#bit CCP1IP           =IPR1.2
#bit SSPIP            =IPR1.3
#bit TXIP             =IPR1.4
#bit RCIP             =IPR1.5
#bit ADIP             =IPR1.6


//;----- PIE2 Bits -----------------------------------------------------
#bit CCP2IE           =PIE2.0
#bit TMR3IE           =PIE2.1
#bit LVDIE            =PIE2.2
#bit BCLIE            =PIE2.3
#bit EEIE             =PIE2.4
#bit CMIE             =PIE2.6
#bit OSCFIE           =PIE2.7

#bit HLVDIE           =PIE2.2


//;----- PIR2 Bits -----------------------------------------------------
#bit CCP2IF           =PIR2.0
#bit TMR3IF           =PIR2.1
#bit LVDIF            =PIR2.2
#bit BCLIF            =PIR2.3
#bit EEIF             =PIR2.4
#bit CMIF             =PIR2.6
#bit OSCFIF           =PIR2.7

#bit HLVDIF           =PIR2.2


//;----- IPR2 Bits -----------------------------------------------------
#bit CCP2IP           =IPR2.0
#bit TMR3IP           =IPR2.1
#bit LVDIP            =IPR2.2
#bit BCLIP            =IPR2.3
#bit EEIP             =IPR2.4
#bit CMIP             =IPR2.6
#bit OSCFIP           =IPR2.7

#bit HLVDIP           =IPR2.2


//;----- EECON1 Bits -----------------------------------------------------
#bit RD               =EECON1.0
#bit WR               =EECON1.1
#bit WREN             =EECON1.2
#bit WRERR            =EECON1.3
#bit FREE             =EECON1.4
#bit CFGS             =EECON1.6
#bit EEPGD            =EECON1.7


//;----- RCSTA Bits -----------------------------------------------------
#bit RX9D             =RCSTA.0
#bit OERR             =RCSTA.1
#bit FERR             =RCSTA.2
#bit ADEN             =RCSTA.3
#bit CREN             =RCSTA.4
#bit SREN             =RCSTA.5
#bit RX9              =RCSTA.6
#bit SPEN             =RCSTA.7

#bit ADDEN            =RCSTA.3


//;----- TXSTA Bits -----------------------------------------------------
#bit TX9D             =TXSTA.0
#bit TRMT             =TXSTA.1
#bit BRGH             =TXSTA.2
#bit SENDB            =TXSTA.3
#bit SYNC             =TXSTA.4
#bit TXEN             =TXSTA.5
#bit TX9              =TXSTA.6
#bit CSRC             =TXSTA.7


//;----- T3CON Bits -----------------------------------------------------
#bit TMR3ON           =T3CON.0
#bit TMR3CS           =T3CON.1
#bit T3SYNC           =T3CON.2
#bit T3CCP1           =T3CON.3
#bit T3CKPS0          =T3CON.4
#bit T3CKPS1          =T3CON.5
#bit T3CCP2           =T3CON.6
#bit RD16             =T3CON.7

#bit NOT_T3SYNC       =T3CON.2


//;----- CMCON Bits -----------------------------------------------------
#bit CM0              =CMCON.0
#bit CM1              =CMCON.1
#bit CM2              =CMCON.2
#bit CIS              =CMCON.3
#bit C1INV            =CMCON.4
#bit C2INV            =CMCON.5
#bit C1OUT            =CMCON.6
#bit C2OUT            =CMCON.7


//;----- CVRCON Bits -----------------------------------------------------
#bit CVR0             =CVRCON.0
#bit CVR1             =CVRCON.1
#bit CVR2             =CVRCON.2
#bit CVR3             =CVRCON.3
#bit CVRSS            =CVRCON.4
#bit CVRR             =CVRCON.5
#bit CVROE            =CVRCON.6
#bit CVREN            =CVRCON.7


/*/;----- BAUDCON Bits -----------------------------------------------------
#bit ABDEN            =BAUDCON.0
#bit WUE              =BAUDCON.1
#bit BRG16            =BAUDCON.3
#bit SCKP             =BAUDCON.4
#bit RCIDL            =BAUDCON.6
#bit ABDOVF           =BAUDCON.7

#bit RCMT             =BAUDCON.6
*/

//;----- BAUDCTL Bits -----------------------------------------------------
#bit ABDEN            =BAUDCTL.0
#bit WUE              =BAUDCTL.1
#bit BRG16            =BAUDCTL.3
#bit SCKP             =BAUDCTL.4
#bit RCIDL            =BAUDCTL.6
#bit ABDOVF           =BAUDCTL.7

#bit RCMT             =BAUDCTL.6


//;----- CCP2CON Bits -----------------------------------------------------
#bit CCP2M0           =CCP2CON.0
#bit CCP2M1           =CCP2CON.1
#bit CCP2M2           =CCP2CON.2
#bit CCP2M3           =CCP2CON.3
#bit CCP2Y            =CCP2CON.4
#bit CCP2X            =CCP2CON.5

#bit DC2B0            =CCP2CON.4
#bit DC2B1            =CCP2CON.5


//;----- CCP1CON Bits -----------------------------------------------------
#bit CCP1M0           =CCP1CON.0
#bit CCP1M1           =CCP1CON.1
#bit CCP1M2           =CCP1CON.2
#bit CCP1M3           =CCP1CON.3
#bit CCP1Y            =CCP1CON.4
#bit CCP1X            =CCP1CON.5

#bit DC1B0            =CCP1CON.4
#bit DC1B1            =CCP1CON.5


//;----- ADCON2 Bits -----------------------------------------------------
#bit ADCS0            =ADCON2.0
#bit ADCS1            =ADCON2.1
#bit ADCS2            =ADCON2.2
#bit ACQT0            =ADCON2.3
#bit ACQT1            =ADCON2.4
#bit ACQT2            =ADCON2.5
#bit ADFM             =ADCON2.7


//;----- ADCON1 Bits -----------------------------------------------------
#bit PCFG0            =ADCON1.0
#bit PCFG1            =ADCON1.1
#bit PCFG2            =ADCON1.2
#bit PCFG3            =ADCON1.3
#bit VCFG0            =ADCON1.4
#bit VCFG1            =ADCON1.5


//;----- ADCON0 Bits -----------------------------------------------------
#bit ADON             =ADCON0.0
#bit GO               =ADCON0.1
#bit CHS0             =ADCON0.2
#bit CHS1             =ADCON0.3
#bit CHS2             =ADCON0.4
#bit CHS3             =ADCON0.5

#bit DONE             =ADCON0.1

#bit NOT_DONE         =ADCON0.1

#bit GO_DONE          =ADCON0.1


//;----- SSPCON2 Bits -----------------------------------------------------
#bit SEN              =SSPCON2.0
#bit RSEN             =SSPCON2.1
#bit PEN              =SSPCON2.2
#bit RCEN             =SSPCON2.3
#bit ACKEN            =SSPCON2.4
#bit ACKDT            =SSPCON2.5
#bit ACKSTAT          =SSPCON2.6
#bit GCEN             =SSPCON2.7


//;----- SSPCON1 Bits -----------------------------------------------------
#bit SSPM0            =SSPCON1.0
#bit SSPM1            =SSPCON1.1
#bit SSPM2            =SSPCON1.2
#bit SSPM3            =SSPCON1.3
#bit CKP              =SSPCON1.4
#bit SSPEN            =SSPCON1.5
#bit SSPOV            =SSPCON1.6
#bit WCOL             =SSPCON1.7


//;----- SSPSTAT Bits -----------------------------------------------------
#bit BF               =SSPSTAT.0
#bit UA               =SSPSTAT.1
#bit R                =SSPSTAT.2
#bit S                =SSPSTAT.3
#bit P                =SSPSTAT.4
#bit D                =SSPSTAT.5
#bit CKE              =SSPSTAT.6
#bit SMP              =SSPSTAT.7


#bit NOT_W            =SSPSTAT.2
#bit NOT_A            =SSPSTAT.5

#bit R_W              =SSPSTAT.2
#bit D_A              =SSPSTAT.5

#bit NOT_WRITE        =SSPSTAT.2
#bit NOT_ADDRESS      =SSPSTAT.5


//;----- T2CON Bits -----------------------------------------------------
#bit T2CKPS0          =T2CON.0
#bit T2CKPS1          =T2CON.1
#bit TMR2ON           =T2CON.2
#bit T2OUTPS0         =T2CON.3
#bit T2OUTPS1         =T2CON.4
#bit T2OUTPS2         =T2CON.5
#bit T2OUTPS3         =T2CON.6

#bit TOUTPS0          =T2CON.3
#bit TOUTPS1          =T2CON.4
#bit TOUTPS2          =T2CON.5
#bit TOUTPS3          =T2CON.6


//;----- T1CON Bits -----------------------------------------------------
#bit TMR1ON           =T1CON.0
#bit TMR1CS           =T1CON.1
#bit T1SYNC           =T1CON.2
#bit T1OSCEN          =T1CON.3
#bit T1CKPS0          =T1CON.4
#bit T1CKPS1          =T1CON.5
#bit T1RUN            =T1CON.6
#bit RD16             =T1CON.7

//#bit NOT_T1SYNC       =T1CON.2


/*/;----- RCON Bits -----------------------------------------------------
#bit BOR              =RCON.0
#bit POR              =RCON.1
#bit PD               =RCON.2
#bit TO               =RCON.3
#bit RI               =RCON.4
#bit SBOREN           =RCON.6
#bit IPEN             =RCON.7

#bit NOT_BOR          =RCON.0
#bit NOT_POR          =RCON.1
#bit NOT_PD           =RCON.2
#bit NOT_TO           =RCON.3
#bit NOT_RI           =RCON.4
*/

//;----- WDTCON Bits -----------------------------------------------------
//#bit SWDTEN           =WDTCON.0

//#bit SWDTE            =WDTCON.0


/*;----- HLVDCON Bits -----------------------------------------------------
#bit LVDL0            =HLVDCON.0
#bit LVDL1            =HLVDCON.1
#bit LVDL2            =HLVDCON.2
#bit LVDL3            =HLVDCON.3
#bit LVDEN            =HLVDCON.4
#bit IRVST            =HLVDCON.5

#bit LVV0             =HLVDCON.0
#bit LVV1             =HLVDCON.1
#bit LVV2             =HLVDCON.2
#bit LVV3             =HLVDCON.3
#bit BGST             =HLVDCON.5

#bit HLVDL0           =HLVDCON.0
#bit HLVDL1           =HLVDCON.1
#bit HLVDL2           =HLVDCON.2
#bit HLVDL3           =HLVDCON.3
#bit HLVDEN           =HLVDCON.4
#bit VDIRMAG          =HLVDCON.7

#bit IVRST            =HLVDCON.5
*/

/*;----- LVDCON Bits -----------------------------------------------------

#bit LVDL0            =LVDCON.0
#bit LVDL1            =LVDCON.1
#bit LVDL2            =LVDCON.2
#bit LVDL3            =LVDCON.3
#bit LVDEN            =LVDCON.4
#bit IRVST            =LVDCON.5

#bit LVV0             =LVDCON.0
#bit LVV1             =LVDCON.1
#bit LVV2             =LVDCON.2
#bit LVV3             =LVDCON.3
#bit BGST             =LVDCON.5
#bit HLVDL0           =LVDCON.0
#bit HLVDL1           =LVDCON.1
#bit HLVDL2           =LVDCON.2
#bit HLVDL3           =LVDCON.3
#bit HLVDEN           =LVDCON.4
#bit VDIRMAG          =LVDCON.7

#bit IVRST            =LVDCON.5
*/

//;----- OSCCON Bits -----------------------------------------------------
/*
#bit SCS0             =OSCCON.0
#bit SCS1             =OSCCON.1
#bit IOFS             =OSCCON.2
#bit OSTS             =OSCCON.3
#bit IRCF0            =OSCCON.4
#bit IRCF1            =OSCCON.5
#bit IRCF2            =OSCCON.6
#bit IDLEN            =OSCCON.7

#bit FLTS             =OSCCON.2

*/
//;----- T0CON Bits -----------------------------------------------------
/*
#bit T0PS0            =T0CON.0
#bit T0PS1            =T0CON.1
#bit T0PS2            =T0CON.2
#bit PSA              =T0CON.3
#bit T0SE             =T0CON.4
#bit T0CS             =T0CON.5
#bit T016BIT          =T0CON.6
#bit TMR0ON           =T0CON.7

#bit T08BIT           =T0CON.6
*/

//;----- STATUS Bits -----------------------------------------------------
/*
#bit C                =STATUS.0
#bit DC               =STATUS.1
#bit Z                =STATUS.2
#bit OV               =STATUS.3
#bit N                =STATUS.4
*/
//;----- INTCON3 Bits -----------------------------------------------------
/*
#bit INT1F            =INTCON3.0
#bit INT2F            =INTCON3.1
#bit INT1E            =INTCON3.3
#bit INT2E            =INTCON3.4
#bit INT1P            =INTCON3.6
#bit INT2P            =INTCON3.7

#bit INT1IF           =INTCON3.0
#bit INT2IF           =INTCON3.1
#bit INT1IE           =INTCON3.3
#bit INT2IE           =INTCON3.4
#bit INT1IP           =INTCON3.6
#bit INT2IP           =INTCON3.7


//;----- INTCON2 Bits -----------------------------------------------------
#bit RBIP             =INTCON2.0
#bit TMR0IP           =INTCON2.2
#bit INTEDG2          =INTCON2.4
#bit INTEDG1          =INTCON2.5
#bit INTEDG0          =INTCON2.6
#bit RBPU             =INTCON2.7

#bit NOT_RBPU         =INTCON2.7


//;----- INTCON Bits -----------------------------------------------------
#bit RBIF             =INTCON.0
#bit INT0F            =INTCON.1
#bit TMR0IF           =INTCON.2
#bit RBIE             =INTCON.3
#bit INT0E            =INTCON.4
#bit TMR0IE           =INTCON.5
#bit PEIE             =INTCON.6
#bit GIE              =INTCON.7

#bit INT0IF           =INTCON.1
#bit T0IF             =INTCON.2
#bit INT0IE           =INTCON.4
#bit T0IE             =INTCON.5
#bit GIEL             =INTCON.6
#bit GIEH             =INTCON.7


//;----- STKPTR Bits -----------------------------------------------------
#bit STKPTR0          =STKPTR.0
#bit STKPTR1          =STKPTR.1
#bit STKPTR2          =STKPTR.2
#bit STKPTR3          =STKPTR.3
#bit STKPTR4          =STKPTR.4
#bit STKUNF           =STKPTR.6
#bit STKOVF           =STKPTR.7

#bit SP0              =STKPTR.0
#bit SP1              =STKPTR.1
#bit SP2              =STKPTR.2
#bit SP3              =STKPTR.3
#bit SP4              =STKPTR.4
#bit STKFUL           =STKPTR.7
*/
//============================================================================
//////// Standard Header file for the PIC18F2525 device ////////////////
//#device PIC18F2525
//#nolist
//////// Program memory: 24576x16  Data RAM: 4096  Stack: 31
//////// I/O: 25   Analog Pins: 10
//////// Data EEPROM: 1024
//////// C Scratch area: 00   ID Location: 2000
//////// Fuses: LP,XT,HS,RC,EC,EC_IO,H4,RC_IO,PROTECT,NOPROTECT,IESO,NOIESO
//////// Fuses: NOBROWNOUT,BROWNOUT,WDT1,WDT2,WDT4,WDT8,WDT16,WDT32,WDT64
//////// Fuses: WDT128,WDT,NOWDT,BORV20,BORV27,BORV42,BORV45,PUT,NOPUT,CPD
//////// Fuses: NOCPD,NOSTVREN,STVREN,NODEBUG,DEBUG,NOLVP,LVP,WRT,NOWRT,WRTD
//////// Fuses: NOWRTD,EBTR,NOEBTR,CPB,NOCPB,EBTRB,NOEBTRB,CCP2B3,CCP2C1
//////// Fuses: WRTC,NOWRTC,WRTB,NOWRTB,INTRC_IO,INTRC,FCMEN,NOFCMEN
//////// Fuses: BROWNOUT_SW,BROWNOUT_NOSL,WDT256,WDT512,WDT1024,WDT2048
//////// Fuses: WDT4096,WDT8192,WDT16384,WDT32768,XINST,NOXINST,PBADEN
//////// Fuses: NOPBADEN,LPT1OSC,NOLPT1OSC,MCLR,NOMCLR
//////// 
////////////////////////////////////////////////////////////////// I/O
// Discrete I/O Functions: SET_TRIS_x(), OUTPUT_x(), INPUT_x(),
//                         PORT_B_PULLUPS(), INPUT(),
//                         OUTPUT_LOW(), OUTPUT_HIGH(),
//                         OUTPUT_FLOAT(), OUTPUT_BIT()
// Constants used to identify pins in the above are:

#define PIN_A0  31744
#define PIN_A1  31745
#define PIN_A2  31746
#define PIN_A3  31747
#define PIN_A4  31748
#define PIN_A5  31749
#define PIN_A6  31750
#define PIN_A7  31751

#define PIN_B0  31752
#define PIN_B1  31753
#define PIN_B2  31754
#define PIN_B3  31755
#define PIN_B4  31756
#define PIN_B5  31757
#define PIN_B6  31758
#define PIN_B7  31759

#define PIN_C0  31760
#define PIN_C1  31761
#define PIN_C2  31762
#define PIN_C3  31763
#define PIN_C4  31764
#define PIN_C5  31765
#define PIN_C6  31766
#define PIN_C7  31767

#define PIN_E3  31779

////////////////////////////////////////////////////////////////// Useful defines
#define FALSE 0
#define TRUE 1

#define BYTE int8
#define BOOLEAN int1

#define getc getch
#define fgetc getch
#define getchar getch
#define putc putchar
#define fputc putchar
#define fgets gets
#define fputs puts

////////////////////////////////////////////////////////////////// Control
// Control Functions:  RESET_CPU(), SLEEP(), RESTART_CAUSE()
// Constants returned from RESTART_CAUSE() are:

#define WDT_TIMEOUT       7    
#define MCLR_FROM_SLEEP  11    
#define MCLR_FROM_RUN    15    
#define NORMAL_POWER_UP  12    
#define BROWNOUT_RESTART 14    
#define WDT_FROM_SLEEP   3     
#define RESET_INSTRUCTION 0    

////////////////////////////////////////////////////////////////// Timer 0
// Timer 0 (AKA RTCC)Functions: SETUP_COUNTERS() or SETUP_TIMER_0(),
//                              SET_TIMER0() or SET_RTCC(),
//                              GET_TIMER0() or GET_RTCC()
// Constants used for SETUP_TIMER_0() are:
#define RTCC_INTERNAL   0
#define RTCC_EXT_L_TO_H 32
#define RTCC_EXT_H_TO_L 48

#define RTCC_DIV_1      8
#define RTCC_DIV_2      0
#define RTCC_DIV_4      1
#define RTCC_DIV_8      2
#define RTCC_DIV_16     3
#define RTCC_DIV_32     4
#define RTCC_DIV_64     5
#define RTCC_DIV_128    6
#define RTCC_DIV_256    7

#define RTCC_OFF        0x80  

#define RTCC_8_BIT      0x40  

// Constants used for SETUP_COUNTERS() are the above
// constants for the 1st param and the following for
// the 2nd param:

////////////////////////////////////////////////////////////////// WDT
// Watch Dog Timer Functions: SETUP_WDT() or SETUP_COUNTERS() (see above)
//                            RESTART_WDT()
// WDT base is 4ms
//
#define WDT_ON      0x100   
#define WDT_OFF     0       

////////////////////////////////////////////////////////////////// Timer 1
// Timer 1 Functions: SETUP_TIMER_1, GET_TIMER1, SET_TIMER1
// Constants used for SETUP_TIMER_1() are:
//      (or (via |) together constants from each group)
#define T1_DISABLED         0
#define T1_INTERNAL         0x85
#define T1_EXTERNAL         0x87
#define T1_EXTERNAL_SYNC    0x83

#define T1_CLK_OUT          8

#define T1_DIV_BY_1         0
#define T1_DIV_BY_2         0x10
#define T1_DIV_BY_4         0x20
#define T1_DIV_BY_8         0x30

////////////////////////////////////////////////////////////////// Timer 2
// Timer 2 Functions: SETUP_TIMER_2, GET_TIMER2, SET_TIMER2
// Constants used for SETUP_TIMER_2() are:
#define T2_DISABLED         0

#define T2_DIV_BY_1         4
#define T2_DIV_BY_4         5
#define T2_DIV_BY_16        6

#define T2_DIV_POS_1        (0 << 3) 
#define T2_DIV_POS_2        (1 << 3)
#define T2_DIV_POS_3        (2 << 3)
#define T2_DIV_POS_4        (3 << 3)
#define T2_DIV_POS_5        (4 << 3)
#define T2_DIV_POS_6        (5 << 3)
#define T2_DIV_POS_7        (6 << 3)
#define T2_DIV_POS_8        (7 << 3)
#define T2_DIV_POS_9        (8 << 3)
#define T2_DIV_POS_10       (9 << 3)
#define T2_DIV_POS_11       (10 << 3)
#define T2_DIV_POS_12       (11 << 3)
#define T2_DIV_POS_13       (12 << 3)
#define T2_DIV_POS_14       (13 << 3)
#define T2_DIV_POS_15       (14 << 3)
#define T2_DIV_POS_16       (15 << 3)

////////////////////////////////////////////////////////////////// Timer 3
// Timer 3 Functions: SETUP_TIMER_3, GET_TIMER3, SET_TIMER3
// Constants used for SETUP_TIMER_3() are:
//      (or (via |) together constants from each group)
#define T3_DISABLED         0
#define T3_INTERNAL         0x85
#define T3_EXTERNAL         0x87
#define T3_EXTERNAL_SYNC    0x83

#define T3_DIV_BY_1         0
#define T3_DIV_BY_2         0x10
#define T3_DIV_BY_4         0x20
#define T3_DIV_BY_8         0x30

////////////////////////////////////////////////////////////////// CCP
// CCP Functions: SETUP_CCPx, SET_PWMx_DUTY
// CCP Variables: CCP_x, CCP_x_LOW, CCP_x_HIGH
// Constants used for SETUP_CCPx() are:
#define CCP_OFF                         0
#define CCP_CAPTURE_FE                  4
#define CCP_CAPTURE_RE                  5
#define CCP_CAPTURE_DIV_4               6
#define CCP_CAPTURE_DIV_16              7
#define CCP_COMPARE_SET_ON_MATCH        8
#define CCP_COMPARE_CLR_ON_MATCH        9
#define CCP_COMPARE_INT                 0xA
#define CCP_COMPARE_INT_AND_TOGGLE      0x2       
#define CCP_COMPARE_RESET_TIMER         0xB
#define CCP_PWM                         0xC
#define CCP_PWM_PLUS_1                  0x1c
#define CCP_PWM_PLUS_2                  0x2c
#define CCP_PWM_PLUS_3                  0x3c
#define CCP_USE_TIMER3                  0x100       
long CCP_1;
#byte   CCP_1    =                      0xfbe       
#byte   CCP_1_LOW=                      0xfbe       
#byte   CCP_1_HIGH=                     0xfbf       
long CCP_2;
#byte   CCP_2    =                      0xfbb       
#byte   CCP_2_LOW=                      0xfbb       
#byte   CCP_2_HIGH=                     0xfbc       
////////////////////////////////////////////////////////////////// SPI
// SPI Functions: SETUP_SPI, SPI_WRITE, SPI_READ, SPI_DATA_IN
// Constants used in SETUP_SPI() are:
#define SPI_MASTER       0x20
#define SPI_SLAVE        0x24
#define SPI_L_TO_H       0
#define SPI_H_TO_L       0x10
#define SPI_CLK_DIV_4    0
#define SPI_CLK_DIV_16   1
#define SPI_CLK_DIV_64   2
#define SPI_CLK_T2       3
#define SPI_SS_DISABLED  1

#define SPI_SAMPLE_AT_END 0x8000
#define SPI_XMIT_L_TO_H  0x4000

////////////////////////////////////////////////////////////////// UART
// Constants used in setup_uart() are:
// FALSE - Turn UART off
// TRUE  - Turn UART on
#define UART_ADDRESS           2
#define UART_DATA              4
#define UART_AUTODETECT        8
#define UART_AUTODETECT_NOWAIT 9
#define UART_WAKEUP_ON_RDA     10
#define UART_SEND_BREAK        13
////////////////////////////////////////////////////////////////// COMP
// Comparator Variables: C1OUT, C2OUT
// Constants used in setup_comparator() are:
#define A0_A3_A1_A3  0xfff04
#define A0_A3_A1_A2_OUT_ON_A4_A5  0xfcf03
#define A0_A3_A1_A3_OUT_ON_A4_A5  0xbcf05
#define NC_NC_NC_NC  0x0ff07
#define A0_A3_A1_A2  0xfff02
#define A0_A3_NC_NC_OUT_ON_A4  0x9ef01
#define A0_VR_A1_VR 0x3ff06
#define A3_VR_A2_VR 0xcff0e
#define CP1_INVERT  0x0000010
#define CP2_INVERT  0x0000020

#bit C1OUT = 0xfb4.6     
#bit C2OUT = 0xfb4.7     

////////////////////////////////////////////////////////////////// VREF
// Constants used in setup_vref() are:
//
#define VREF_LOW  0xa0
#define VREF_HIGH 0x80
// Or (with |) the above with a number 0-15
#define VREF_F5   0x40
#define VREF_COMP 0x10

////////////////////////////////////////////////////////////////// VREF
// Constants used in setup_low_volt_detect() are:
//
#define LVD_LVDIN   0x1F
#define LVD_45 0x1E
#define LVD_42 0x1D
#define LVD_40 0x1C
#define LVD_38 0x1B
#define LVD_36 0x1A
#define LVD_35 0x19
#define LVD_33 0x18
#define LVD_30 0x17
#define LVD_28 0x16
#define LVD_27 0x15
#define LVD_25 0x14
#define LVD_24 0x13
#define LVD_23 0x12
#define LVD_22 0x11
#define LVD_21 0x10

#define LVD_TRIGGER_BELOW 0
#define LVD_TRIGGER_ABOVE 0x80


////////////////////////////////////////////////////////////////// INTERNAL RC
// Constants used in setup_oscillator() are:
// First param:
#define OSC_31KHZ   0
#define OSC_125KHZ  0x10
#define OSC_250KHZ  0x20
#define OSC_500KHZ  0x30
#define OSC_1MHZ    0x40
#define OSC_2MHZ    0x50
#define OSC_4MHZ    0x60
#define OSC_8MHZ    0x70
#define OSC_16MHZ   0x4060
#define OSC_32MHZ   0x4070
// The following may be OR'ed in with the above using |
#define OSC_TIMER1  1
#define OSC_INTRC   2
#define OSC_NORMAL  0
// The following may be OR'ed in with the above using |
#define OSC_IDLE_MODE  0x80
#define OSC_31250   0x8000
#define OSC_PLL_ON  0x4000
#define OSC_PLL_OFF 0
// A second optional parameter may be used with this part to fine
// tune the speed (signed int,0-31)
// Result may be (ignore all other bits)
#define OSC_STATE_STABLE 4
#define OSC_STATE_EXT_RUNNING 8


////////////////////////////////////////////////////////////////// ADC
// ADC Functions: SETUP_ADC(), SETUP_ADC_PORTS() (aka SETUP_PORT_A),
//                SET_ADC_CHANNEL(), READ_ADC()
// Constants used for SETUP_ADC() are:
#define ADC_OFF               0           // ADC Off
#define ADC_CLOCK_DIV_2   0x100
#define ADC_CLOCK_DIV_4    0x04
#define ADC_CLOCK_DIV_8    0x01
#define ADC_CLOCK_DIV_16   0x05
#define ADC_CLOCK_DIV_32   0x02
#define ADC_CLOCK_DIV_64   0x06
#define ADC_CLOCK_INTERNAL 0x07           // Internal 2-6us
// The following may be OR'ed in with the above using |
#define ADC_TAD_MUL_0      0x00
#define ADC_TAD_MUL_2      0x08
#define ADC_TAD_MUL_4      0x10
#define ADC_TAD_MUL_6      0x18
#define ADC_TAD_MUL_8      0x20
#define ADC_TAD_MUL_12     0x28
#define ADC_TAD_MUL_16     0x30
#define ADC_TAD_MUL_20     0x38

// Constants used in SETUP_ADC_PORTS() are:
#define NO_ANALOGS   0x0F   // None
#define ALL_ANALOG   0x00   // A0 A1 A2 A3 A5 B2 B3 B1 B4 B0              
#define AN0_TO_AN11  0x03   // A0 A1 A2 A3 A5 B2 B3 B1 B4                 
#define AN0_TO_AN10  0x04   // A0 A1 A2 A3 A5 B2 B3 B1                    
#define AN0_TO_AN9   0x05   // A0 A1 A2 A3 A5 B2 B3                       
#define AN0_TO_AN8   0x06   // A0 A1 A2 A3 A5 B2                          
#define AN0_TO_AN4   0x0A   // A0 A1 A2 A3 A5
#define AN0_TO_AN3   0x0B   // A0 A1 A2 A3
#define AN0_TO_AN2   0x0C   // A0 A1 A2
#define AN0_TO_AN1   0x0D   // A0 A1
#define AN0          0x0E   // A0
#define AN0_TO_AN11_ANALOG     0x03   //!old only provided for compatibility
#define AN0_TO_AN10_ANALOG     0x04   //!old only provided for compatibility
#define AN0_TO_AN9_ANALOG      0x05   //!old only provided for compatibility
#define AN0_TO_AN8_ANALOG      0x06   //!old only provided for compatibility
#define AN0_TO_AN4_ANALOG      0x0A   //!old only provided for compatibility
#define AN0_TO_AN3_ANALOG      0x0B   //!old only provided for compatibility
#define AN0_TO_AN2_ANALOG      0x0C   //!old only provided for compatibility
#define AN0_TO_AN1_ANALOG      0x0D   //!old only provided for compatibility
#define AN0_ANALOG             0x0E   //!old only provided for compatibility

// The following may be OR'ed in with the above using |
#define VSS_VDD               0x00              // Range 0-Vdd
#define VREF_VREF             0x30              // Range VrefL-VrefH
#define VREF_VDD              0x20              // Range VrefL-Vdd
#define VSS_VREF              0x10              // Range 0-VrefH


// Constants used in READ_ADC() are:
#define ADC_START_AND_READ     7   // This is the default if nothing is specified
#define ADC_START_ONLY         1
#define ADC_READ_ONLY          6





////////////////////////////////////////////////////////////////// INT
// Interrupt Functions: ENABLE_INTERRUPTS(), DISABLE_INTERRUPTS(),
//                      CLEAR_INTERRUPT(), INTERRUPT_ACTIVE(),
//                      EXT_INT_EDGE()
//
// Constants used in EXT_INT_EDGE() are:
#define L_TO_H              0x40
#define H_TO_L                 0
// Constants used in ENABLE/DISABLE_INTERRUPTS() are:
#define GLOBAL                    0xF2C0
#define INT_RTCC                  0xF220
#define INT_TIMER0                0xF220
#define INT_TIMER1                0x9D01
#define INT_TIMER2                0x9D02
#define INT_TIMER3                0xA002
#define INT_EXT                   0xF210
#define INT_EXT1                  0xF008
#define INT_EXT2                  0xF010
#define INT_RB                    0xF208
#define INT_AD                    0x9D40
#define INT_RDA                   0x9D20
#define INT_TBE                   0x9D10
#define INT_SSP                   0x9D08
#define INT_CCP1                  0x9D04
#define INT_CCP2                  0xA001
#define INT_BUSCOL                0xA008
#define INT_LOWVOLT               0xA004
#define INT_COMP                  0xA040
#define INT_EEPROM                0xA010
#define INT_OSCF                  0xA080

//#list



